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authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>2016-03-19 13:56:29 +0100
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>2016-04-19 18:10:31 +0200
commite764ee13ae21e3c1dbda24daeb2d08c5e7c81871 (patch)
tree091fdf5c1b7aeac9715ddb9ecf8fb556561723a1
parent061ce9399a08f3edd4f5af16afd36bb14d58c864 (diff)
downloadmesa-e764ee13ae21e3c1dbda24daeb2d08c5e7c81871.tar.gz
mesa-e764ee13ae21e3c1dbda24daeb2d08c5e7c81871.tar.xz
radeonsi: split setting graphics and compute descriptors
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
-rw-r--r--src/gallium/drivers/radeonsi/si_compute.c3
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c61
-rw-r--r--src/gallium/drivers/radeonsi/si_state.h7
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c2
4 files changed, 59 insertions, 14 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 269cb20..921b62c 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -452,6 +452,9 @@ static void si_launch_grid(
if (!si_switch_compute_shader(sctx, program, &program->shader, info->pc))
return;
+ si_upload_compute_shader_descriptors(sctx);
+ si_emit_compute_shader_userdata(sctx);
+
if (si_is_atom_dirty(sctx, sctx->atoms.s.render_cond)) {
sctx->atoms.s.render_cond->emit(&sctx->b,
sctx->atoms.s.render_cond);
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 944c498..301a865 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -186,7 +186,8 @@ static void si_reinitialize_ce_ram(struct si_context *sctx,
}
static bool si_upload_descriptors(struct si_context *sctx,
- struct si_descriptors *desc)
+ struct si_descriptors *desc,
+ struct r600_atom * atom)
{
unsigned list_size = desc->num_elements * desc->element_dw_size * 4;
@@ -232,7 +233,10 @@ static bool si_upload_descriptors(struct si_context *sctx,
}
desc->pointer_dirty = true;
desc->dirty_mask = 0;
- si_mark_atom_dirty(sctx, &sctx->shader_userdata.atom);
+
+ if (atom)
+ si_mark_atom_dirty(sctx, atom);
+
return true;
}
@@ -1373,7 +1377,8 @@ static void si_emit_shader_pointer(struct si_context *sctx,
desc->pointer_dirty = keep_dirty;
}
-void si_emit_shader_userdata(struct si_context *sctx, struct r600_atom *atom)
+void si_emit_graphics_shader_userdata(struct si_context *sctx,
+ struct r600_atom *atom)
{
unsigned i;
uint32_t *sh_base = sctx->shader_userdata.sh_base;
@@ -1397,7 +1402,7 @@ void si_emit_shader_userdata(struct si_context *sctx, struct r600_atom *atom)
R_00B130_SPI_SHADER_USER_DATA_VS_0, true);
}
- for (i = 0; i < SI_NUM_SHADERS; i++) {
+ for (i = 0; i < SI_NUM_GRAPHICS_SHADERS; i++) {
unsigned base = sh_base[i];
if (!base)
@@ -1414,6 +1419,20 @@ void si_emit_shader_userdata(struct si_context *sctx, struct r600_atom *atom)
si_emit_shader_pointer(sctx, &sctx->vertex_buffers, sh_base[PIPE_SHADER_VERTEX], false);
}
+void si_emit_compute_shader_userdata(struct si_context *sctx)
+{
+ unsigned base = R_00B900_COMPUTE_USER_DATA_0;
+
+ si_emit_shader_pointer(sctx, &sctx->const_buffers[PIPE_SHADER_COMPUTE].desc,
+ base, false);
+ si_emit_shader_pointer(sctx, &sctx->shader_buffers[PIPE_SHADER_COMPUTE].desc,
+ base, false);
+ si_emit_shader_pointer(sctx, &sctx->samplers[PIPE_SHADER_COMPUTE].views.desc,
+ base, false);
+ si_emit_shader_pointer(sctx, &sctx->images[PIPE_SHADER_COMPUTE].desc,
+ base, false);
+}
+
/* INIT/DEINIT/UPLOAD */
void si_init_all_descriptors(struct si_context *sctx)
@@ -1460,7 +1479,7 @@ void si_init_all_descriptors(struct si_context *sctx)
/* Shader user data. */
si_init_atom(sctx, &sctx->shader_userdata.atom, &sctx->atoms.s.shader_userdata,
- si_emit_shader_userdata);
+ si_emit_graphics_shader_userdata);
/* Set default and immutable mappings. */
si_set_user_data_base(sctx, PIPE_SHADER_VERTEX, R_00B130_SPI_SHADER_USER_DATA_VS_0);
@@ -1469,21 +1488,41 @@ void si_init_all_descriptors(struct si_context *sctx)
si_set_user_data_base(sctx, PIPE_SHADER_FRAGMENT, R_00B030_SPI_SHADER_USER_DATA_PS_0);
}
-bool si_upload_shader_descriptors(struct si_context *sctx)
+bool si_upload_graphics_shader_descriptors(struct si_context *sctx)
{
int i;
for (i = 0; i < SI_NUM_SHADERS; i++) {
- if (!si_upload_descriptors(sctx, &sctx->const_buffers[i].desc) ||
- !si_upload_descriptors(sctx, &sctx->rw_buffers[i].desc) ||
- !si_upload_descriptors(sctx, &sctx->shader_buffers[i].desc) ||
- !si_upload_descriptors(sctx, &sctx->samplers[i].views.desc) ||
- !si_upload_descriptors(sctx, &sctx->images[i].desc))
+ if (!si_upload_descriptors(sctx, &sctx->const_buffers[i].desc,
+ &sctx->shader_userdata.atom) ||
+ !si_upload_descriptors(sctx, &sctx->rw_buffers[i].desc,
+ &sctx->shader_userdata.atom) ||
+ !si_upload_descriptors(sctx, &sctx->shader_buffers[i].desc,
+ &sctx->shader_userdata.atom) ||
+ !si_upload_descriptors(sctx, &sctx->samplers[i].views.desc,
+ &sctx->shader_userdata.atom) ||
+ !si_upload_descriptors(sctx, &sctx->images[i].desc,
+ &sctx->shader_userdata.atom))
return false;
}
return si_upload_vertex_buffer_descriptors(sctx);
}
+bool si_upload_compute_shader_descriptors(struct si_context *sctx)
+{
+ /* Does not update rw_buffers as that is not needed for compute shaders
+ * and the input buffer is using the same SGPR's anyway.
+ */
+ return si_upload_descriptors(sctx,
+ &sctx->const_buffers[PIPE_SHADER_COMPUTE].desc, NULL) &&
+ si_upload_descriptors(sctx,
+ &sctx->shader_buffers[PIPE_SHADER_COMPUTE].desc, NULL) &&
+ si_upload_descriptors(sctx,
+ &sctx->samplers[PIPE_SHADER_COMPUTE].views.desc, NULL) &&
+ si_upload_descriptors(sctx,
+ &sctx->images[PIPE_SHADER_COMPUTE].desc, NULL);
+}
+
void si_release_all_descriptors(struct si_context *sctx)
{
int i;
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index edc03fb..3679532 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -257,14 +257,17 @@ void si_set_ring_buffer(struct pipe_context *ctx, uint shader, uint slot,
bool add_tid, bool swizzle,
unsigned element_size, unsigned index_stride, uint64_t offset);
void si_init_all_descriptors(struct si_context *sctx);
-bool si_upload_shader_descriptors(struct si_context *sctx);
+bool si_upload_graphics_shader_descriptors(struct si_context *sctx);
+bool si_upload_compute_shader_descriptors(struct si_context *sctx);
void si_release_all_descriptors(struct si_context *sctx);
void si_all_descriptors_begin_new_cs(struct si_context *sctx);
void si_upload_const_buffer(struct si_context *sctx, struct r600_resource **rbuffer,
const uint8_t *ptr, unsigned size, uint32_t *const_offset);
void si_shader_change_notify(struct si_context *sctx);
void si_update_compressed_colortex_masks(struct si_context *sctx);
-void si_emit_shader_userdata(struct si_context *sctx, struct r600_atom *atom);
+void si_emit_graphics_shader_userdata(struct si_context *sctx,
+ struct r600_atom *atom);
+void si_emit_compute_shader_userdata(struct si_context *sctx);
/* si_state.c */
struct si_shader_selector;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 131c377..232f7a5 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -828,7 +828,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
sctx->current_rast_prim = info->mode;
if (!si_update_shaders(sctx) ||
- !si_upload_shader_descriptors(sctx))
+ !si_upload_graphics_shader_descriptors(sctx))
return;
if (info->indexed) {