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authorLinus Torvalds <torvalds@linux-foundation.org>2013-06-08 11:51:13 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-06-08 11:51:13 -0700
commit554e6e9f816bdf08c2962e6f003f8298c935646b (patch)
tree8adb0eb9738b86b0ce038acb227df1e915cf378f /arch/mips/cavium-octeon/setup.c
parent17d8dfcda6ce570ddc4844f490104fed4af215aa (diff)
parentcdfce53986a39daf039b62b69026867734d8430a (diff)
downloadlinux-554e6e9f816bdf08c2962e6f003f8298c935646b.tar.gz
linux-554e6e9f816bdf08c2962e6f003f8298c935646b.tar.xz
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "MIPS fixes across the field. The only area that's standing out is the exception handling which received it's dose of breakage as part of the microMIPS patchset" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: ralink: add missing SZ_1M multiplier MIPS: Compat: Fix cputime_to_timeval() arguments in compat binfmt_elf. MIPS: OCTEON: Improve _machine_halt implementation. MIPS: rtlx: Fix implicit declaration of function set_vi_handler() MIPS: Trap exception handling fixes MIPS: Quit exposing Kconfig symbols in uapi headers. MIPS: Remove duplicate definition of check_for_high_segbits.
Diffstat (limited to 'arch/mips/cavium-octeon/setup.c')
-rw-r--r--arch/mips/cavium-octeon/setup.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index b0baa29..01b1b3f 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -428,13 +428,16 @@ static void octeon_restart(char *command)
*/
static void octeon_kill_core(void *arg)
{
- mb();
- if (octeon_is_simulation()) {
- /* The simulator needs the watchdog to stop for dead cores */
- cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);
+ if (octeon_is_simulation())
/* A break instruction causes the simulator stop a core */
- asm volatile ("sync\nbreak");
- }
+ asm volatile ("break" ::: "memory");
+
+ local_irq_disable();
+ /* Disable watchdog on this core. */
+ cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);
+ /* Spin in a low power mode. */
+ while (true)
+ asm volatile ("wait" ::: "memory");
}