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authorOlof Johansson <olof@lixom.net>2013-06-07 18:18:08 -0700
committerOlof Johansson <olof@lixom.net>2013-06-07 18:18:19 -0700
commit3d0d8b9155b2a60e3d2498e7d928051043d2d546 (patch)
tree970ddbaf041a3cc7fd1383a5e21863f6342c8e47 /arch/arm/mach-imx/clk-imx6q.c
parent9c1fcdccc7ce5611ec1edf45dbbe51b10e333bd3 (diff)
parenta08b9bc586a7810cdebbc316d5cbaed56a2a04a9 (diff)
downloadlinux-3d0d8b9155b2a60e3d2498e7d928051043d2d546.tar.gz
linux-3d0d8b9155b2a60e3d2498e7d928051043d2d546.tar.xz
Merge tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, imx fixes for 3.10, take 2: - One device tree fix for all spi node to have per clock added. The clock is needed by spi driver to calculate bit rate divisor. The spi node in the current device trees either does not have the clock or is defined as dummy clock, in which case the driver probe will fail or spi will run at a wrong bit rate. - Two imx6q clock fixes, which correct axi_sels and ldb_di_sels. * tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: imx: clk-imx6q: AXI clock select index is incorrect ARM: dts: imx: fix clocks for cspi ARM i.MX6q: fix for ldb_di_sels Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx6q.c')
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index dda9a2b..4e3148c 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -181,14 +181,14 @@ static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy",
static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
-static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "pll3_pfd1_540m", };
+static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
static const char *audio_sels[] = { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd3_454m", "pll3_usb_otg", };
static const char *gpu_axi_sels[] = { "axi", "ahb", };
static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m", };
static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
-static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
+static const char *ldb_di_sels[] = { "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };