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authorAlex Deucher <alexander.deucher@amd.com>2016-02-03 18:59:33 -0500
committerAlex Deucher <alexander.deucher@amd.com>2016-02-04 12:24:15 -0500
commit6950af4e8475fa969ba46675fe2665c842fc4b79 (patch)
treeb37222dc40478701b78611048d1c08b9609f99ff
parent35c35ea66d7940e78cf375e569e659f66e9fb69d (diff)
downloadlibdrm-6950af4e8475fa969ba46675fe2665c842fc4b79.tar.gz
libdrm-6950af4e8475fa969ba46675fe2665c842fc4b79.tar.xz
tests/amdgpu: add a test for cp dma copy
Use the CP to copy data between buffers Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--tests/amdgpu/basic_tests.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 5a02ab5..4ef6014 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -455,12 +455,19 @@ static void amdgpu_command_submission_cp_const_fill(void)
amdgpu_command_submission_const_fill_helper(AMDGPU_HW_IP_GFX);
}
+static void amdgpu_command_submission_cp_copy_data(void)
+{
+ amdgpu_command_submission_copy_linear_helper(AMDGPU_HW_IP_GFX);
+}
+
static void amdgpu_command_submission_gfx(void)
{
/* write data using the CP */
amdgpu_command_submission_cp_write_data();
/* const fill using the CP */
amdgpu_command_submission_cp_const_fill();
+ /* copy data using the CP */
+ amdgpu_command_submission_cp_copy_data();
/* separate IB buffers for multi-IB submission */
amdgpu_command_submission_gfx_separate_ibs();
/* shared IB buffer for multi-IB submission */
@@ -1023,6 +1030,17 @@ static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type)
pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32;
pm4[i++] = 0xffffffff & bo2_mc;
pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32;
+ } else if (ip_type == AMDGPU_HW_IP_GFX) {
+ pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5);
+ pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) |
+ PACKET3_DMA_DATA_DST_SEL(0) |
+ PACKET3_DMA_DATA_SRC_SEL(0) |
+ PACKET3_DMA_DATA_CP_SYNC;
+ pm4[i++] = 0xfffffffc & bo1_mc;
+ pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32;
+ pm4[i++] = 0xfffffffc & bo2_mc;
+ pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32;
+ pm4[i++] = sdma_write_length;
}
amdgpu_test_exec_cs_helper(context_handle,