summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRobert Foss <robert.foss@collabora.com>2017-05-31 20:40:31 -0400
committerRobert Foss <robert.foss@collabora.com>2017-05-31 20:40:31 -0400
commit75439dbb1b0639d45c0f969bcda66bab2f832eb1 (patch)
tree85e66ac0dd9c6fa97fa03a5f8e73ec144abc1c33
parent4323288f7722e50e34be1c8ce2101a1f4eb4a89f (diff)
downloadgbm_gralloc-android-etnaviv-modifiers-v2.tar.gz
gbm_gralloc-android-etnaviv-modifiers-v2.tar.xz
-rw-r--r--gralloc.cpp5
-rw-r--r--gralloc_gbm.cpp161
2 files changed, 163 insertions, 3 deletions
diff --git a/gralloc.cpp b/gralloc.cpp
index f3d91b7..22d6a1d 100644
--- a/gralloc.cpp
+++ b/gralloc.cpp
@@ -38,6 +38,9 @@
#include "gralloc_drm.h"
#include "gralloc_gbm_priv.h"
+#define LOG_TAG "GRALLOC"
+#include <cutils/log.h>
+
struct gbm_module_t {
gralloc_module_t base;
@@ -134,7 +137,7 @@ static int gbm_mod_register_buffer(const gralloc_module_t *mod,
{
struct gbm_module_t *dmod = (struct gbm_module_t *) mod;
int err;
-
+ ALOGE("gbm_mod_register_buffer 1");
err = gbm_init(dmod);
if (err)
return err;
diff --git a/gralloc_gbm.cpp b/gralloc_gbm.cpp
index 8f71e5a..db42445 100644
--- a/gralloc_gbm.cpp
+++ b/gralloc_gbm.cpp
@@ -23,6 +23,7 @@
*/
#define LOG_TAG "GRALLOC-GBM"
+#include <drm/drm_fourcc.h>
#include <cutils/log.h>
#include <cutils/atomic.h>
@@ -42,6 +43,157 @@
#include "gralloc_gbm_priv.h"
#include "gralloc_drm_handle.h"
+#include <drm/drm_fourcc.h>
+#define DRM_FORMAT_MOD_NONE 0
+#define DRM_FORMAT_MOD_VENDOR_NONE 0
+#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01
+#define DRM_FORMAT_MOD_VENDOR_AMD 0x02
+#define DRM_FORMAT_MOD_VENDOR_NV 0x03
+#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
+#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
+#define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06
+/* add more to the end as needed */
+
+#define fourcc_mod_code(vendor, val) \
+ ((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | (val & 0x00ffffffffffffffULL))
+
+/*
+ * Format Modifier tokens:
+ *
+ * When adding a new token please document the layout with a code comment,
+ * similar to the fourcc codes above. drm_fourcc.h is considered the
+ * authoritative source for all of these.
+ */
+
+/*
+ * Linear Layout
+ *
+ * Just plain linear layout. Note that this is different from no specifying any
+ * modifier (e.g. not setting DRM_MODE_FB_MODIFIERS in the DRM_ADDFB2 ioctl),
+ * which tells the driver to also take driver-internal information into account
+ * and so might actually result in a tiled framebuffer.
+ */
+#define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0)
+
+/* Intel framebuffer modifiers */
+
+/*
+ * Intel X-tiling layout
+ *
+ * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
+ * in row-major layout. Within the tile bytes are laid out row-major, with
+ * a platform-dependent stride. On top of that the memory can apply
+ * platform-depending swizzling of some higher address bits into bit6.
+ *
+ * This format is highly platforms specific and not useful for cross-driver
+ * sharing. It exists since on a given platform it does uniquely identify the
+ * layout in a simple way for i915-specific userspace.
+ */
+#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
+
+/*
+ * Intel Y-tiling layout
+ *
+ * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
+ * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
+ * chunks column-major, with a platform-dependent height. On top of that the
+ * memory can apply platform-depending swizzling of some higher address bits
+ * into bit6.
+ *
+ * This format is highly platforms specific and not useful for cross-driver
+ * sharing. It exists since on a given platform it does uniquely identify the
+ * layout in a simple way for i915-specific userspace.
+ */
+#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
+
+/*
+ * Intel Yf-tiling layout
+ *
+ * This is a tiled layout using 4Kb tiles in row-major layout.
+ * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
+ * are arranged in four groups (two wide, two high) with column-major layout.
+ * Each group therefore consits out of four 256 byte units, which are also laid
+ * out as 2x2 column-major.
+ * 256 byte units are made out of four 64 byte blocks of pixels, producing
+ * either a square block or a 2:1 unit.
+ * 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
+ * in pixel depends on the pixel depth.
+ */
+#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
+
+/*
+ * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
+ *
+ * Macroblocks are laid in a Z-shape, and each pixel data is following the
+ * standard NV12 style.
+ * As for NV12, an image is the result of two frame buffers: one for Y,
+ * one for the interleaved Cb/Cr components (1/2 the height of the Y buffer).
+ * Alignment requirements are (for each buffer):
+ * - multiple of 128 pixels for the width
+ * - multiple of 32 pixels for the height
+ *
+ * For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html
+ */
+#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
+
+/* Vivante framebuffer modifiers */
+
+/*
+ * Vivante 4x4 tiling layout
+ *
+ * This is a simple tiled layout using tiles of 4x4 pixels in a row-major
+ * layout.
+ */
+#define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1)
+
+/*
+ * Vivante 64x64 super-tiling layout
+ *
+ * This is a tiled layout using 64x64 pixel super-tiles, where each super-tile
+ * contains 8x4 groups of 2x4 tiles of 4x4 pixels (like above) each, all in row-
+ * major layout.
+ *
+ * For more information: see
+ * https://github.com/etnaviv/etna_viv/blob/master/doc/hardware.md#texture-tiling
+ */
+#define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2)
+
+/*
+ * Vivante 4x4 tiling layout for dual-pipe
+ *
+ * Same as the 4x4 tiling layout, except every second 4x4 pixel tile starts at a
+ * different base address. Offsets from the base addresses are therefore halved
+ * compared to the non-split tiled layout.
+ */
+#define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3)
+
+/*
+ * Vivante 64x64 super-tiling layout for dual-pipe
+ *
+ * Same as the 64x64 super-tiling layout, except every second 4x4 pixel tile
+ * starts at a different base address. Offsets from the base addresses are
+ * therefore halved compared to the non-split super-tiled layout.
+ */
+#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
+
+#ifndef DRM_FORMAT_MOD_INVALID
+#define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1)
+#endif
+
+static const char *modifier_to_string(uint64_t modifier)
+{
+ switch (modifier)
+ {
+ case DRM_FORMAT_MOD_INVALID: return "DRM_FORMAT_MOD_INVALID";
+ case DRM_FORMAT_MOD_LINEAR: return "DRM_FORMAT_MOD_LINEAR";
+ case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED: return "DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED";
+ case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED: return "DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED";
+ case DRM_FORMAT_MOD_VIVANTE_TILED: return "DRM_FORMAT_MOD_VIVANTE_TILED";
+ case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED: return "DRM_FORMAT_MOD_VIVANTE_SUPER_TILED";
+ default: return "---ERROR modifier_to_string failed---";
+ }
+}
+
#define MAX(a, b) (((a) > (b)) ? (a) : (b))
#define unlikely(x) __builtin_expect(!!(x), 0)
@@ -119,6 +271,7 @@ static struct gralloc_gbm_bo_t *gbm_import(struct gbm_device *gbm,
data.stride = handle->stride;
data.format = format;
data.modifier = handle->modifier;
+ ALOGE("gbm_import 1 handle->modifier=%s", modifier_to_string(handle->modifier));
/* Adjust the width and height for a GBM GR88 buffer */
if (handle->format == HAL_PIXEL_FORMAT_YV12) {
data.width /= 2;
@@ -126,9 +279,11 @@ static struct gralloc_gbm_bo_t *gbm_import(struct gbm_device *gbm,
}
buf->bo = gbm_bo_import(gbm, GBM_BO_IMPORT_FD_MODIFIER, &data, 0);
if (!buf->bo) {
+ ALOGE("gbm_import 1.1 bo==NULL");
delete buf;
return NULL;
}
+ ALOGE("gbm_import 2 handle->modifier=%s bo=%p", modifier_to_string(handle->modifier), buf->bo);
return buf;
}
@@ -177,7 +332,7 @@ static struct gralloc_gbm_bo_t *gbm_alloc(struct gbm_device *gbm,
handle->prime_fd = gbm_bo_get_fd(buf->bo);
handle->stride = gbm_bo_get_stride(buf->bo);
handle->modifier = gbm_bo_get_modifier(buf->bo);
-
+ ALOGE("gbm_alloc handle=%p modifier=%s", handle, modifier_to_string(handle->modifier));
return buf;
}
@@ -289,7 +444,8 @@ static struct gralloc_gbm_bo_t *validate_handle(buffer_handle_t _handle,
if (!gbm)
return NULL;
- ALOGV("handle: pfd=%d\n", handle->prime_fd);
+ ALOGE("validate_handle handle->prime_fd=%d\n", handle->prime_fd);
+ ALOGE("validate_handle handle->modifier=%s\n", modifier_to_string(handle->modifier));
bo = gbm_import(gbm, handle);
if (bo) {
@@ -309,6 +465,7 @@ static struct gralloc_gbm_bo_t *validate_handle(buffer_handle_t _handle,
*/
int gralloc_gbm_handle_register(buffer_handle_t handle, struct gbm_device *gbm)
{
+ ALOGE("gralloc_gbm_handle_register 1 handle=%p", handle);
return (validate_handle(handle, gbm)) ? 0 : -EINVAL;
}